The SPHERE project aims at providing an integrated operating system framework to abstract the hardware complexity of cutting-edge multi-core platforms and simplify the management of heterogeneous computational resources.
The SPHERE framework addresses these challenges by providing methodologies and tools for:
The feasibility of the SPHERE framework will be validated in a highly relevant industrial use case: a pioneering autonomous driving system for the automotive domain.
Duration: 3 years
Start date: 1/09/2019
End date: 31/08/2022
Coordinator: Giorgio Buttazzo (Scuola Sant'Anna)
Funding Body: MIUR - PRIN 2017
The SPHERE project will provide an integrated framework to allow an easy programmability of next-generation heterogeneous multi-core systems for developing real-time parallel applications, decreasing by order-of-magnitudes the time-to-market and development cost. To that aim, SPHERE investigates predictable and efficient execution models and co-scheduling mechanisms to manage the parallel computing power of the addressed platform. An open source virtualization layer integrating these mechanisms allows hiding the complex management of heterogeneous resources under a clean parallel programming interface based on a widely adopted programming model.
As shown in the figure, the SPHERE framework considers two kinds of processing devices: normal cores (possibly with different processing power) and special devices, like GPUs, DSP clusters and FPGA fabric. A hypervisor layer residing on the host subsystem will manage the access to all devices in a predictable way, providing a guaranteed bandwidth to each software component. Each component comes with its own operating system and requirements, which shall not be influenced by other components.
The main difficulty in achieving this goal on heterogeneous platforms is due to the mutual interferences that arise on the shared resources like accelerators, I/O devices, communication, and memory resources. To limit such interferences, the hypervisor implements innovative co-scheduling techniques to arbitrate the access to all shared resources, ensuring that the maximum lateness of each running component is predictably bounded.
To guarantee a secure and trusted execution environment, SPHERE extends and integrates the selected hypervisor with innovative features devoted to hardware security and trust.
Concerning communication, SPHERE targets novel network architectures and configurations, bandwidth reservation mechanisms, medium access control techniques, and suitable transmission scheduling algorithms to meet the requirements imposed by the applications under the typical operating conditions.
The SPHERE projecr will be presented at the 4th Italian Workshop on Embedded Systems in Naples (September 30 – October 1, 2019).
The ReTiS lab held the kick-off meeting of the SPHERE project.